There are a number of methods by which integrated circuit chips may be mounted on a higher level of assembly, such as a printed circuit board. For example, one such technique generally known as "A-wire" or "lead on chip"(LOC) involves placing the chip inside a plastic package and coupling certain contact points on the chip with somewhat rigid conductive leads by means of a thin wire bond. The leads are then bonded to corresponding contact pads on a printed circuit board, which thereby enables the chip to communicate with the board. In an alternative packaging scheme, generally referred to as "tape automated bonding"(TAB) the chip is mounted on a tape which is configured to also have a series of conductive leads, albeit somewhat flexible ones, which are used to make contact with conductive points around the periphery of the chip. The end of the lead opposite to the connection with the chip is then used to make contact with the higher level of assembly, which again may be a printed circuit board. In both LOC and TAB the leads establish the electrical paths by which the chip is accessed for signal transmission, as well as for providing power and ground.
With regard to LOC and TAB, both such techniques generally require the higher level of assembly, such as a printed circuit board, to have a place for mounting the chip package which is larger than the chip itself Since in both instances the chip, either by itself or when surrounded by a plastic package, will have the leads extend out from its periphery, the finished chip package will make a so-called "footprint" on the higher level of assembly that is necessarily larger than the chip itself. A further limitation of the TAB method of packaging in particular, is that TAB has been used for making connection with chip contact pads that are positioned around the periperhy of the chip, but not contact pads disposed in the central region of the chip. Many modern chips are now designed with their contact points in the center, as that particular arrangement tends to reduce the noise which may effect the operation of the electrical circuits contained within. TAB, therefore, is not well suited for use with chips configured with their contact points centrally located.
Still another method of mounting a chip on a higher level of assembly, is the so-called "C4" technique, which generally involves creating a plurality of dome-like solder balls on one side of the chip. The C4 balls are the connection points by which the chip is accessed for signal transmission, as well as for providing power and ground. One of the limitations of C4 technology, however, is that power and ground signals for the circuits located in a given portion of the chip are provided through localized C4 connections. In other words, circuits in one region of the chip will be serviced by one set of C4 balls carrying power and ground, while circuits in a second region will be serviced by another set of C4 balls carrying power and ground, and so on for all of the circuits on the chip. As a result, chips having C4 connections tend to have a large number of power and ground C4 balls, which are in addition to the multiplicity of C4 balls that are needed for signal connections. Accordingly, due to the inherent spacing limitations of the chip's side, designing a chip for connection to a higher level of assembly through C4 balls can be problematic.